Voltage Sag Compensation in Fourteen Bus System during Line Interruption Using Interline Dynamic Voltage Restorer

Abstract

This paper deals with power quality improvement in fourteen bus system (FBS) using IDVR. Investigations were carried out to find the improvement of real and reactive power by employing IDVR during line outage condition. The closed loop responses of PI, PID and FL controlled systems are modelled and simulated using simulink and the results are obtained. Load flow studies were conducted for healthy system, FBS with line outage and FBS with line outage with inclusion of IDVR. The simulation studies indicate that, the voltage under line outage condition with IDVR is almost equal to the voltage under healthy condition. The Responses of closed loop systems with PI, PID and FLC are compared and the analysis shows the improvement in dynamic response in terms of settling time and steady state error. The advantages of proposed system is improved voltage stability, flexibility to control real and reactive powers and concluded that FLC based IDVR system had better time response. The prototype for four bus system with IDVR is modelled and the results are obtained.