A Simplified PWM Technique for Reduced Switch Count Multilevel Inverter
Abstract
Penetration of multilevel inverters (MLI) in to high power and medium voltage application has been increasing because of its advantages. The conventional two levels inverter has high harmonic distortion which gives poor power quality. Lot of topologies has been developed to overcome the drawbacks of a two level inverter. These topologies include more number of switching devices which increases the design complexity and cost. The optimum design of inverter requires less number of switches with better quality in waveform. In this paper, a symmetrical five level and seven levels inverter configuration with simplified pulse width modulation technique is proposed. This proposed inverter requires less switches, less protection circuits along with low cost and size. The analysis of the inverter circuits is done by using Matlab/Simulink software. The synthesized staircase wave form is shown and total harmonic distortion (THD) is also measured.
Keywords
Full Text:
PDFDOI: http://doi.org/10.11591/ijeecs.v9.i3.pp711-721
Refbacks
- There are currently no refbacks.
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).