Single Phase Variable Sampling Phase Locked Loop using Composite Observer
Abstract
An observer based variable sampling period phase locked loop is introduced for grid connected systems. The composite observer acts as an efficient estimator of the fundamental components from a periodic input signal rich in DC and harmonics. The observer gains are designed using pole placement technique, which inherently ensures the stability of this estimator. Even under drift frequency, a constant number of samples (512) per cycle are maintained with the help of the numerically controlled oscillator. This makes the oscillator gain elements in the observer a constant and eliminates the trigonometric computation. This phase locked loop is found to be working in a wide range of frequency 40 – 70Hz. The performance of the proposed scheme is studied with a synthetic harmonic rich signal as well as validated by implementing the PLL in Cyclone IV FPGA with a real time grid voltage.
Keywords
Full Text:
PDFDOI: http://doi.org/10.11591/ijeecs.v2.i1.pp49-60
Refbacks
- There are currently no refbacks.
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).