Power Factor Correction using Valley-Fill SEPIC Topology with Fuzzy Logic Control

Abstract

This paper deals with a new Single Ended Primary Inductance Converter (SEPIC) for Power Factor Correction (PFC). The proposed converter is used in combination with SEPIC and a valley fill circuit. The valley fill circuit improves the efficiency of the SEPIC by reducing the harmonics in the supply mains. The power factor is also enhanced compared to the conventional PFC converters. It uses the simple control strategy for controlling the power factor of the AC mains. It can be preferred to low power applications, since it has the merits like less input current ripples and less total harmonic distortion (THD). To observe the performance of the Valley fill circuit, a model based on the SEPIC topology has been designed by using MULTISIM and MATLAB / SIMULINK environment and implemented with one cycle control (OCC) and Fuzzy logic controller. The simulations results are demonstrated in order to validate the effectiveness of the controllers in power factor improvement.