Field programmable gate array implementation of edge detection system based on an improved sobel edge detector

Duong Huu Ai, Cong Dat Vuong, Khanh Ty Luong, Viet Truong Le

Abstract


Field programmable gate array (FPGA) is an integrated circuit consisting of internal hardware blocks with programmable link connections for users to customize operations for a particular application. Link connections can be easily reprogrammed, allowing the FPGA to adapt to changes to the design or even support a new application throughout the department's uptime. One of the important tasks in image processing is image edge detection image, with computer aided, image recognition is concerned with the recognition and classification of objects in an image, so edge detection is an important tool. In this paper, we design filter for edge detection in image processing using FPGA kit. We analysis and implementation of algorithm for image processing on FPGA, load the code and run the results. Comparative analysis with images processed by MATLAB software.


Keywords


Algorithm for image processing; Design filter; Field-programmable gate array; Image edge detection; Image processing

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DOI: http://doi.org/10.11591/ijeecs.v32.i3.pp1378-1383

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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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