Transmission line characterization and modeling for electronic circuits and systems design

Oluwole John Famoriji, Thokozani Shongwe

Abstract


Channel bandwidth-limited high-speed links or interfaces make circuit solutions not efficient. Both recent and subsequent links (SerDes-Serializer/Deserializer) design demand efficient and effective coupling between future circuit design, communication, and optimization. The challenges vary and new solutions are needed. In this article, an analytical wireline model is presented to predict electronic path loss towards adequate designs of electronic circuits and systems. An open loop system analysis is adapted in this paper. Our model was tested against different channels: a legacy channel with via stub discontinuity and FR4 dielectric, and a more recent microwave-engineered channel without stub and NELCO 6,000 dielectric, a very good matching attained. Good agreement was observed between our model and electromagnetic full-wave simulation data, as a result showed high level of applicability to thin-film microstrip line for adequate circuit design. The model is recommended for electronic engineers for adequate and faster interfaces and high-speed links designs.

Keywords


Electronics; Loss; Microstrip channel; Modeling; Thin-film circuit

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DOI: http://doi.org/10.11591/ijeecs.v30.i2.pp730-738

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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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