Reduction of common mode voltage for cascaded multilevel inverters using phase shift keying technique

Vinh-Quan Nguyen, QuangTho Tran


Demand of cascaded multilevel inverters in industries of electric drives and renewable energy is increasing due to their large-scale capacity and high voltage. The modulation technique of inverters significantly affects the power quality of the inverter output voltage. This paper proposes a new method of carrier wave modulation using the phase shift keying technique for cascaded multilevel inverters. The phase of a constant frequency carrier wave is changed at an accurate time by an input sinusoidal control signal. This modulation technique is simply implemented and only needs a small memory. It also helps reduce the common mode voltage of inverters in order to suppress the output voltage harmonics. Moreover, the ability to reduce switching count also helps the inverters decrease switching loss. The simulated and experienced results on a cascaded 9-level 3-phase inverter and an F28379D DSP kit have validated the performance of the proposed technique compared with that of the APOD and POD methods.


Carrier wave modulation; Cascaded multilevel inverter; Common mode (CM) voltage; Phase shift keying (PSK); Total harmonic distortion (THD)

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