Hardware-in-the-loop and Parallel Simulation Architecture for Wireless Sensor Network

Abstract

Discrete event-based simulation is commonly used to evaluate research on Wireless Sensor Networks (WSNs). However, highly accurate simulation models are required in recent advances on wireless communication technology, which results in a steep increase in simulation complexity and runtime. The contributions of this paper for the are twofold, one is to present a general layer structure for hardware-in-the-loop emulation and WSN simulation embedded with implementation of models, such as energy model and link mode, to introduce the distributed nodes into the simulation framework; the other is to build a parallelized simulation based on multi-processor computers as the de-facto default hardware platform and powerful private computing clusters to mirror the real WSN more closely. The work in this paper is realized and used to simulate industrial WSNs for describing and verifying the detail and methodology of WSNs.

DOI: http://dx.doi.org/10.11591/telkomnika.v11i1.1876