Compact modeling of strained GAA SiNW

Fatimah K. A Hamid, N. Ezaila Alias, R. Ismail, M. Anas Razali


Strain-based on advanced MOSFET is a promising candidate for the future of CMOS technology. A numerical model is not favorable compared to a compact model because it cannot be integrated into most simulator software. Thus, a compact model is proposed to overcome the shortcomings in the analytical model. In this paper, a charge-based compact model is presented for long-channel strained Gate-All-Around Silicon Nanowire (GAA SiNW) from an undoped channel to a doped body. The model derivation is based on an inversion charge which has been solved explicitly using the smoothing function. The drain current model is formulated from Pao Sah’s dual integral which is formed in terms of inversion charge at the drain and source terminals. The proposed model has been extensively verified with the numerical simulator data. The strained effect on the electrical parameters are studied based on inversion charge, threshold voltage and current-voltage (I-V) characteristics. Results show that the current, the inversion charge and the threshold voltage can be greatly improved by the strain. The threshold voltage was reduced approximately 40% from the conventional GAA SiNW. Moreover, the inversion charge was improved by 30 % and the on-state current has doubled compared to unstrained device.



Full Text:




  • There are currently no refbacks.

Creative Commons License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

shopify stats IJEECS visitor statistics