A Nine Level Cascaded Multi Level Inveter Using Embedded and FlipFlops

Chinnapettai Ramalingam Balamurugan, S.P. Natarajan, T.S. Anandhi, B. Shanthi

Abstract


This paper proposes a nine level cascaded multilevel inverter based on the flip flops and logic gates. Generally multilevel inverter is used to achieve the high power by using a series of power semiconductor switches with the several dc voltage sources which is used to perform the power conversion. In this paper the flip flop based CMLI is compared with the conventional CMLI. The flip flops and logic gates are used to create logic equation for the each switch of the CMLI by using the switching states. This proposed topology is mainly used to reduce the total harmonic distortion and also increase the performance of the system.

 

DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.7978


Keywords


CMLI, PWM, Embedded Controller, Flip flops, Logic gates

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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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