Scaling Model for Silicon Germanium Heterojunction Bipolar Transistor

Abstract

In the past half-century, scaling has been used to improve semiconductor devices performance. In this paper, we study the effects of scaling on SiGe(C) heterojunction bipolar transistors (HBTs) performances i.e. cutoff frequency (f_T), maximum frequency of oscillation (f_max) and gate delay (τ_g). The SiGe HBT scaling models are developed from more than twenty years accumulated reported data. The results show that the peak cutoff frequency shows an increasing trend with emitter width scaling with a factor of ~W_E^-0.719, the peak maximum frequency of oscillation shows an increasing trend with emitter width scaling with a factor of ~W_E^-0.723 and the gate delay shows a decreasing trend with emitter width scaling with a factor of ~W_E^0.778.

DOI: http://dx.doi.org/10.11591/telkomnika.v14i1.7469