FPGA Implementation of a Nakagami-m fading channel Simulator using Random Number Generator

Santhosh Kumar B, K. Ayyappa Swamy

Abstract


By realizing the concept of implementation of the radio propagation channels on simulators is the eminent intention of this work. Even though prototyping software simulators are effortless to design we prefer hardware simulators as they endeavors distinguishable quickness, compared to earlier. Prior to this work fading channels like Gaussian, Rayleigh and Rician fading channel simulators were executed on hard ware.(i.e. FPGA) The significant target  of this attempt is to implement Nakagami-m  fading channel on hardware as they preserved for  unsubstantial consideration. While differentiating with other fading channels  Nakagami-m fading channel acquires wide spread applications, as its capability of providing  appropriate fit for practical fading data, as this is flexible through its size parameter ‘m’, over which representation of signal fading conditions that vary  from serious to modest, to normal  fading or no fading is accomplished . The proposed hardware simulator can hatches complex Nakagami variates after it was implemented on XilinxSpartan-xc3s500e-4fg320 FPGA. This is operated at 50MHz.


Keywords


Nakagami-m, Fading, Quickness, Modest, Representation, FPGA

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DOI: http://doi.org/10.11591/ijeecs.v4.i1.pp133-140

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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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