Random access memory page caching: a strategy for enhancing shared virtual memory multicomputer systems performance

Stepan Vyazigin, Madina Mansurova, Victor Malyshkin, Aygul Shaykhulova


This study examines a modified approach to optimizing the performance of support vector machine (SVM)-type multicomputer systems through a distinct type of caching method that allocates space in the random access memory (RAM) of a computing node for caching pages. The article extensively describes research on enhancing the performance of the SVM system through memory page caching in RAM at the hardware level by implementing the SVM system based on field-programmable gate arrays (FPGA). A systematic comparative evaluation highlights a discernible enhancement in system performance relative to systems not equipped with the revised caching algorithm. These findings could prove instrumental for subsequent studies focused on optimizing the performance of SVM systems, providing empirical data to inform future investigations and potential applications in multicomputer system performance enhancement.


Boolean; Combinatorial space; Data caching; Random access memory; Systems with shared virtual memory; Working set

Full Text:


DOI: http://doi.org/10.11591/ijeecs.v34.i3.pp1879-1892


  • There are currently no refbacks.

Creative Commons License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

The Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

shopify stats IJEECS visitor statistics