New design of Network on Chip Based on Virtual Routers

Mohamed Fehmi Chatmen, Adel Baganne, Rached Tourki

Abstract


Network is considered the most convenient way to communicate between different IP integrated into the same chip. Studies have been developed to propose networks with improved performance in terms of latency, power consumption, throughput and quality of service. Most of these networks have been designed based on the 2-dimensional network structure. Recently, with the introduction of the new structure of 3D integrated circuits (3D IC), new works have used this type of circuit to design 3 dimensions on-chip networks. The advantage brought by this new structure is to reduce the average number of hops crossed from the source to the destination, which improves the throughput and the average latency of the network.


Keywords


System-on-Chip (SoC), Network-on-Chip (NoC), adaptive routing. 3D Integrated Circuit, TSV (through Silicon Via)

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DOI: http://doi.org/10.11591/ijeecs.v2.i1.pp115-131

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