FPGA Realization of PID Controller Based on BP Neural Network

Shanyong Xu, Yourui Huang, Liguo Qu, Chaoli Tang

Abstract


Through coordinately work of input layer module, hidden layer module, output layer module and back propagation calculation module to complete the whole system of the closed-loop calculation, this is a process of FPGA realization of PID controller based on BP neural network. Operation of the entire system with FPGA internal clock coordination is unified coordination, just provide clock and reset signals can automatically tune parameters of PID controller.

 

DOI: http://dx.doi.org/10.11591/telkomnika.v11i10.3464

 

 


Keywords


BP neural network; PID controller; FPGA realization; parameter tuning

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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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