Optimization of high-k composite dielectric materials of variable oxide thickness tunnel barrier for nonvolatile memory
Abstract
Downscaling the tunnel oxide thickness has become one of the innovative solutions to minimize the operational voltage with better the programming/erasing (P/E) operation time. However, the downscaling technique faces several challenges where the conventional SiO2 tunnel layer has reached its limit. But a practical alternative has been introduced; Variable Oxide Thickness (VARIOT) technology in flash memory has been promising. VARIOT is one of tunnel barrier engineering technology for incorporating the high-k dielectric materials as a composite tunnel barrier. This paper presents the VARIOT concept to determine the optimum set of combination, the equivalent oxide thickness (EOT) and the low-k oxide thickness (Tox) for alternate high-k materials. Fowler-Nordheim (F-N) tunneling coefficients are also extracted for various combinations of VARIOT, where in this work ZrO2, HfO2, Al2O3, La2O3, and Y2O3 are used. The VARIOT optimization is conducted using 3-Dimensional (3D) Silicon Nanowire Field-Effect-Transistor (SiNWFET) device structure and simulated in TCAD Simulation tools. From the simulation results, it has found out that the high-k materials of La2O3 asymmetric stack is the excellent dielectric material among four (4) other dielectric materials; ZrO2, HfO2, Al2O3 and Y2O3 for EOT=4nm and Tox=1nm.
Keywords
High-k, J-V curve, TCAD Simulator, VARIOT
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PDFDOI: http://doi.org/10.11591/ijeecs.v14.i2.pp765-772
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Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).