Mark S. Hooper
https://www.scopus.com/authid/detail.uri?authorId=7102699454
Analog/RF IC Design Engineer (Consultant) at Microsemi, United States
Mark S. Hooper received B.S.E.E. from University of California in 1989, M.S.E.E. from San Jose State University in 1994, and Ph.D.E.E. from Georgia Institute of Technology in 2005. He experienced in the analog/mixed signal IC design field with responsibilities for the design of various IC projects at ON Semiconductor, Georgia Tech, Schneider Electric, Xicor and San Jose State University at the system, circuit, device and semiconductor levels in CMOS and Bipolar technologies.
Many of these projects were taken through the standard design cycle. Experienced in providing evaluation of new product proposals, performing feasibility studies, supporting test development, product definition, and production. Mask design guidance, silicon evaluation, applications support and data sheet writing have also been my responsibilities. Also managed and set up a small mixed signal IC design center at Georgia Institute of Technology for ON Semiconductor.
His objective is to continue gaining experience in analog/RF/MM IC design. Have a history of significantly advancing the state-of-the art, working well in teams, adapting quickly to new technologies and achieving short and long term goals.
He Could work on a variety of designs containing among others PLLs, ADCs/DACs, DC-DC converters, high speed I/O, Serdes, mixers, LNAs, VCOs, amplifiers, comparators, mixers, boost, buck, buck-boost converters and filters using Cadence, Mentor Grpahics, Spice or other design tools.
He was Chair of IEEE CAS Chapter of the Year Award (USA & Canada) in 2009 and also Chair of IEEE Santa Clara Valley Circuits and Systems Society, since January 2006 – December 2010 (5 years).