Voltage harmonics reduction in single phase 9-level transistor clamped H-bridge inverter using nearest level control method

Nurul Ain Mohd Said, Wail Ali Ali Saleh, Wahidah Abd Halim

Abstract


This paper proposes a nearest level control method based modulation scheme for a 9-level symmetrical Transistor Clamped H-bridge (TCHB) inverter. The topology has gained increasing research focus due to its advantages in obtaining high quality output while using a reduced number of electronic components. The device count for obtaining a 9-level output voltage is it uses 10 active switches as compared to the 16 being used in a conventional 9-level cascaded H-Bridge (CHB) inverter. The significant contribution of the research is the development of the NLC modulation technique that operates at the fundamental frequency, thus reducing switching losses, and able to reduce harmonic content significantly. The reduced harmonic content can lessen the power quality problem. The NLC modulation scheme, shows that the overall THD is reduced without the need for filtration. The 50 values of harmonic content will be count that follows the IEEE Standard 519. MATLAB/Simulink based simulations and experimental results obtained from the laboratory prototype of a single-phase TCHB inverter feeding a R load validate the theoretical analyses and effectiveness of the proposed modulation scheme.

Keywords


Asymmetrical topologies; Multilevel inverter; Nearest level control; Total harmonic distortion; Transistor-clamped; H-bridge

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DOI: http://doi.org/10.11591/ijeecs.v20.i3.pp1725-1732

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The Indonesian Journal of Electrical Engineering and Computer Science (IJEECS)
p-ISSN: 2502-4752, e-ISSN: 2502-4760
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).

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